The present invention relates to a high-frequency amplifier for amplifying an input high-frequency signal.
In recent years, high-frequency amplifiers including a Field Effect Transistor (FET) using a gallium arsenide (GaAs) process, a silicon-germanium (SiGe) process, a Complementary Metal Oxide Semiconductor (CMOS) process, or the like have been used for terrestrial microwave communication and satellite communication so as to transmit a radio signal in a microwave range of 1 GHz or higher. Such a high-frequency amplifier generally amplifies an input high-frequency signal using a plurality of amplifiers, combines high-frequency signals amplified by these amplifiers, and outputs a resultant signal so as to obtain high power. These amplifiers in such a high-frequency amplifier each include a group of a plurality of FET elements or FETs, and are arranged in parallel so as to perform power amplification. In such a configuration, a divider distributes an input high-frequency signal equally among a plurality of amplifiers and a combiner combines high-frequency signals output from these amplifiers and outputs a resultant signal.
In current years, F-class amplification is employed in high-frequency amplifiers and the increase in power efficiency is achieved with harmonics. A high-frequency amplifier employing the F-class amplification is a broadband high-frequency amplifier that can handle harmonics such as second and third harmonics of frequencies higher than a target frequency and uses zero power for all harmonics by short-circuiting even harmonics such as a second harmonic and opening odd harmonics such as a third harmonic. This leads to high power efficiency. However, the second and third harmonics have short wavelengths and easily propagate through various signal lines. In order to prevent such a harmonic from outputting from the output end of a combiner, a circuit for reflecting the harmonic is provided. However, for example, when an input high-frequency signal is distributed between two parallel-connected amplifiers by a divider and signals output from these two amplifiers are combined by a combiner, a loop path of the output end of one of the amplifiers, the line of the combiner, the output end of the other one of the amplifiers, the input end of the other one of the amplifiers, the line of the divider, the input end of one of the amplifiers, and the output end of one of the amplifiers is generated. In this loop, oscillation may occur. Therefore, Patent Reference 1 discloses the method of preventing the occurrence of loop oscillation between the input end of a high-frequency amplifier and an amplifier.
FIG. 9 is a schematic diagram of a high-frequency amplifier 1x disclosed in Patent Reference 1. The high-frequency amplifier 1x illustrated in FIG. 9 includes a divider substrate 40x, an amplification circuit substrate 50x, and a combiner substrate 60x. The divider substrate 40x has a conductor pattern including a plurality of branching terminals 21x, 22x, 23x, and 24x for distributing a high-frequency signal input into an input terminal 20x. The amplification circuit substrate 50x amplifies high-frequency signals output from the branching terminals 21x, 22x, 23x, and 24x. The combiner substrate 60x combines high-frequency signals output from the amplification circuit substrate 50x. In the conductor pattern of the divider substrate 40x, resistive pattern portions 41x, 42x, 43x, and 44x are formed between the input terminal 20x and the branching terminals 21x, 22x, 23x, and 24x, respectively, on an insulating substrate. The resistive pattern portions 41x, 42x, 43x, and 44x between the input terminal 20x of the high-frequency amplifier 1x and the amplification circuit substrate 50x attenuate high-frequency loop signals and prevent the occurrence of loop oscillation.